The invention relates to image sensor arrays, and more particularly, to a sensor array which can be operated both synchronously and asynchronously.
Image sensor arrays typically comprise a linear array of photodiodes which raster scan an image bearing document and convert the microscopic image areas viewed by each photosite to image signal charges. Following an integration period, the image signal charges are amplified and transferred to a common output line or bus through successively actuated multiplexing transistors.
Image sensor arrays such as disclosed in U.S. Pat. No. 4,737,854 to Tandon et al, assigned to Xerox Corporation, the assignor of the present application, operate in a synchronous manner in which operation of the array is locked to the frequency of the array driving clock pulses. There, the array driving clock pulses continue uninterruptedly whenever power to the scanner with which the array is associated is turned on, the clock pulses providing an ever-repeating sequence of reset, transfer, and charge injection. When the scanner is dormant and no scanning is taking place, the video signals produced by the array are discarded or dumped.
While synchronous operation provides effective scanning, there are applications where asynchronous operation is desirable or when required as for example when the document scan line information needs to be collected and made available on command. One example of the need for asynchronous operation is a scanner which is connected to a computer. Usually, the computer can accept only small amounts of data at a time and it would be desirable to have the scanner only scan when the computer is ready to accept information.
In the prior art, the aforementioned U.S. Pat. No. 4,737,854 discloses an image sensor array with two-stage transfer employing two transistors in series for transferring the image signal charges developed on the array photodiodes to a source follower for later transfer to a common output line by a multiplexing transistor. A publication entitled "A Low-Noise CCD Input With Reduced Sensitivity to Threshold Voltage" by Emmons et al (Technical Digest of International Electron Devices Meeting, pp. 233-235, December 1974) discloses a CCD input structure in which the injected charge is obtained from the differences between two voltage levels at a capacitive node with both levels set using the same FET structure to cancel threshold differences. "Charge-coupled Devices and Systems", edited by M. J. Howes et al and published by John Wiley & Sons, pp. 70-72 further discusses and refers to the aforecited Emmons et al article (identified as citation #46 in the Wiley & Sons publication).
Further in the prior art, U.S. Pat. Nos. 4,878,119 to Beikirch et al and 4,771,333 to Michaels disclose asynchronous type scanners in which CCD image sensors are operated in an asynchronous mode by ensuring that all the charge packets in the analog shift registers are removed before a new integration interval is started.